Essential Duties and responsibilities:Definition and design of test-bench and test plan for verifying Chip Level RTLDevelop complex test cases that involve control/data paths of multiple IPs at chip levelResponsible for developing, executing and debugging test cases in RTL, Gate Level and FPGA RTL simulation environmentsReport coverage including functional, code and other metrics.Support module and sub-system level verification for SoCWork closely with ASIC design team to triage and resolve issuesOther Responsibilities:Interfaces with Architecture, ASIC, and Validation teams through the product technology development phaseYour contributions will have an immediate contribution to the company’s success in our fast paced environment.QUALIFICATIONS:Education RequirementsBS/MS in EE/CE, plus 5+ years of Design Verification experienceFamiliarity with ASIC, Computer and Embedded Systems ArchitecturesExcellent oral and written communication skills with people at all levels, a must.Team player, with excellent debugging skillsSkills/ExperienceMandatory ExperienceWorked on grounds up development of verification infrastructure, test benches and layered VIPs using System Verilog and UVM methodology.Requires demonstrated technical expertise in developing IP-level and system-level test-plans, test bench development, functional coverage, stimulus generation, reference models, checkers, monitors and scoreboards.Good familiarity with all functional verification aspects such as regressions, code/functional coverage and assertions.Working experience with Verilog, System Verilog, Object Oriented Programming/C++, Perl, and logic simulation is a requirement.Working experience with Design Verification Tools and Process flows with leading edge ASIC technologies.Highly Desirable ExperiencesFamiliarity with writing and debugging C tests for ARM processors.Familiarity with SSD related protocols such as PCIe/NVMe/SATA/SAS, NAND and DDR.Scripting and test automation for regression.Experience with gate-level simulations.Experience with Emulation Platform such as Palladium, Xilinx and/or Altera FPGAs technology.LANGUAGE SKILLS:Ability to read, write and comprehend complex instructions, correspondence, and emails in English. Ability to effectively present information in one-on-one and group situations to internal customers and other employees of the organization.REASONING ABILITY:Ability to solve practical problems and deal with a variety of variables. Ability to interpret a variety of instructions furnished in written, oral, or schedule form. PHYSICAL DEMANDS:The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions. Frequent sitting, standing, walking, bending, use of hands and fingers, lifting under 20 pounds, grasping, and fine hand manipulation.WORK ENVIRONMENT:The work environment characteristics described here are representative of those an employee encounters while performing the essential functions of this job. Comfortable temperatures, mild noise, working in close proximity to others, and occasional confined spaces.ABOUT WESTERN DIGITAL:Western Digital Corporation is the world’s largest data storage company with a leading portfolio of HGST, SanDisk, G-Technology and WD brands covering flash and disk-based solutions. Deployed by the largest and most prominent organizations worldwide, Western Digital solutions are everywhere, touching lives and enabling great value from the data they possess. Western Digital is an equal opportunity employer. We are committed to providing equal employment opportunity for all applicants and employees. Western Digital does not unlawfully discriminate and complies with the laws and regulations set forth in the following EEO Is The Law poster: Equal Employment Opportunity Is The Law.Western Digital participates in the E-Verify program in the US. For more information click here. Este empleador participa in E-Verify.