Candidate is familiar with wafer foundry development and device qualification including packaging interactions. Candidate has experience in semiconductor development as project manager, process integrator and process engineer (etch, thin film and hot processes). Candidate has integrated and build up several CMOS semiconductor and memory process flows in the past and has credibility in achieving yielding products. He/She is able to assure high yield of individual process modules despite continuous simplification of total process flow. He/She is able to Identify high risk processes, plan to improve and develop solutions to optimize and increase wafer and product yield.Candidate developed critical process modules by integrating advanced processes developed on existing and new manufacturing equipment. Candidate is also familiar with simplification and cost reduction initiatives and has experience in transferring processes from and to different manufacturing sites. Candidate has understanding of detailed device aspects, junction engineering, device layout optimization, ground rule and electrical design rule as well as good understanding of programming algorithms and performance metrics.