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Principal Engineer, ASIC Development Engineering

Location: Bangalore, KA, India 
Req ID: JR-0000038036



  • ·         Drive and Own the Pre-Si/Sillicon Validation and Validation FW development for Multiple IP blocks.
  • ·         Own the SOC Validation Strategy and Plan for multiple IP blocks
  • ·         Must operate in multi-site environment to coordinate and satisfy goals which have broad business impacts (some travel is required)
  • ·         Develop, debug, and maintain validation firmware for multiple functional hardware blocks that exist in the SoC within a multi-processor ARM core architecture.
  • ·         Expertise in or ability to learn NAND technology and develop/enhance validation plans and firmware for the same.
  • ·         Develop and port drivers and test Firmware for IP blocks.
  • ·         Debug failures and perform root cause analysis with JTAG Debuggers, ICE, Scopes, Logic Analyzers in both pre and Post-Si environments
  • ·         Develop/execute/debug test cases in Pre-Sillicon Validation on Palladium, FPGA and in-house emulators.
  • ·         Collaborate with HW and FW teams.
  • ·         Mentor Junior engineers.
  • ·         Working closely with different teams within organization and tracking bugs to closure
  • ·         Be involved in SOC bring-up and Post Si Validation


Experience Required:

  • ·         8-14 years of hands-on experience with low level driver development and RTOS, C, Embedded Systems.
  • ·         Good understanding of SOC internal architecture and concepts.
  • ·         Familiarity with HW Accelerators, Error handling and Hashing methods would be a plus.
  • ·         Candidate should be familiar with using lab equipment such as Oscilloscopes, Logic Analyzers.
  • ·         Hands-on experience of using JTAG debuggers and In circuit Emulators such as Green Hills, D-STREAM, Keil  etc.
  • ·         Version control, makefiles, and PERL scripting for tools and test automation
  • ·         Hands-on experience in executing and debugging in Pre-Si emulation platforms like Palladium, Veloce, FPGA, Simulation environments would be as added advantage
  • ·         Expert in writing optimized FW using underlying HW capabilities to the fullest
  • ·         Experience with ARM architecture a plus.


Soft Skills:

  • ·         Excellent interpersonal skills and ability to interact across teams and geographies
  • ·         Excellent verbal & written communication skills
  • ·         Excellent problem solving and debugging skills
  • ·         Team player who provides appropriate feedback to management & team members
  • ·         Self-motivated individual who impacts the direction of the company & organization
  • ·         Demonstrated Leadership skills in at least one endeavor
  • ·         Ability to Guide and mentor Junior Engineers.