Description
Job Description:
The Tools team is developing a wide range of FPGA solution for post silicon validation for memory devices across Western Digital.
The team is looking for a talented, energetic team leader with communication capabilities and proven ability to lead a small group of engineers (4-5) in a multi-disciplinary environment with a variety of interfaces.
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Qualifications & Experience:
• First or Second degree in EE, CE or equivalent
• At least 5 years of experience in RTL logic
• Proven experience in leading a small group of ~ 5 engineers
• Hands on capabilities
• Experience with Xilinx
• Experience & Knowledge with System Verilog
• Knowledge in synthesis and timing analysis
• Experience in multi clock and high frequencies designs
• Experience in standard protocols such PCIe, UFS and DDR3 – advantage
• Deep knowledge of the following tools:
ISE/Vivado – advantage
NCSim – advantage
Synplify
• Knowledge with Perl/python – advantage
• Knowledge simulation environment System Verilog based – advantage
• Experience in board design would be an added advantage