Principal Engineer, ASIC Design Verification
Location: Hsinchu, Taiwan
Req ID: JR-0000041096
We deliver the possibilities of data. YOU define what’s possible.
ESSENTIAL DUTIES AND RESPONSIBILITIES:
• Development of ASIC verification and Validation plans
• Development of C, SystemVerilog or Verilog test case for ASIC verification and validation to achieve comprehensive coverage
• Working with ASIC design and architecture teams to understand functionality of logic blocks of SSD controller
• Comprehending 'big picture' at the ASIC architectural and system level as well as executing at the detail block level.
• Master degree in Electrical Engineering or Computer Science.
• 4+ years of applicable experience.
• Knowledge of HDL and experience in behavioral and RTL coding, Verilog preferred.
• Knowledge of ARM AMBA Bus protocols
• Knowledge of C and SystemVerilog.
• Knowledge of UVM verification methodology
• Experience in C code development for System validation.
• Familiar with scripting language like Perl/Python/Tcl
ABOUT WESTERN DIGITAL
Western Digital Corporation is the world’s largest data storage company with a leading portfolio of HGST, SanDisk, G-Technology and WD brands covering flash and disk-based solutions. Deployed by the largest and most prominent organizations worldwide, Western Digital solutions are everywhere, touching lives and enabling great value from the data they possess.